Electronic Devices Notes and MCQs

Notes 25 Pages

Joint Entrance Examination (Main)

Physics

Contributed by

Yash Kuruvilla

322
SUMMARY
Conductor :-

Presence of free electrons

Electrical resistivity is quite less
Insulator :-

No free electrons

Very large electrical resistivity
Semi-conductor :-

Electrical resistance greater than conductor but smallar than insulator

At 0 K temperature it behaves like perfect insulator (in pure form)
Hole :-

An empty space, when covalent bond breaks and electron gets escaped.

It is electron deficiency space called hole

behaves like positive electric charge.
For intrinsic (pure) semi-conductor :-

n
i
= n
e
= n
h
where n
i
= Intrinsic electrical charge carrier density, n
e
= number density of electrons
n
h
= number density of holes

Electrical conduction is due to both, electrons and holes
* Extrinsic semi-conductor :-
(1) N-type :

Pentavalent impurity is added

Majority charge carrier are electrons

n
e
> n
h
(2) P-type :

Trivalent imparity is added

Majority charge carries are holes

n
h
> n
e
*

Valence Band :- Completely filled (with 4N electrons) lower band is called valence band
* Forbidden Gap :- The region above valance band without any available energy levels is called forbidden gap
* Conduction Band :- The region above forbidden gap is called conduction band
* Band Gap (Eg) :- The difference between minimum energy (Ec) of conduction band and maximum energy
(Ev) of valence band is known as band gap energy

For Insulator Eg > 3eV

For Conductor Eg = 0

For semiconductor Eg < 3eV
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323
* Depletion Region :-

A region near the junction which is deplete of respective majority charge carriers.

Thickness is about 0.5

m
* Depletion Barrier :- The varying electrical potential near junction is called depletion barrier (0.7V for Si
and 0.3V for Ge)
* Forward Bias :-

When P end of PN junction is connected to positive pole of the battery and N end is connected
to negative pole of the battery, then such an arrangement is called forward bias.

Depletion barrier (P.d) and Depletion region (width) is decreased.
* Reverse Bias :-

When P end of PN junction is connected to negative pole of the battery and N end is connected
to positive pole of the battery, then such an arrangement is called forward bias.

Depletion barrier (P.d) and depletion region (width) are increased
* Brekdown voltage :- In reverse bias condition of PN junction, for certain voltage, current increases suddenly.
This certain voltage is called breakdown voltage.
* Zener effect :- Due to smaller width of depletion region even at small reverse bias voltage, electric field
becomes strong enough to break covalent bond, giving large number of electron hole pair is called
zener effect
* Avalanche effect :- Due to large width of depletion region, at only high reverse bias voltage electric field in
the depletion region becomes strong enough to break many covalent bonds, giving rise to so many
charge carrier is called avalanch effect and diode is called avalanche diode
* Regulated Power Supply :- If D.C. output voltage, in a rectifier circuit (or power supply) remains constant
with the charge in load current I
L
, then such power supply is called reguluted power supply
* Rectification and Rectifier :- The process of obtaining D.C. voltage (or current) from A.C. voltage (or
current) is called rectification and circuit assembled for this process is called rectifier
* TRANSISTOR

Transistor is a device made of two PN junctions

Junction between base and emitter is called emitter junction

Junction between base and collector is called collector junction

For proper working of transistor, emitter junction should be forward biased and collector
junction should be reverse biased

A.C. parameters for a transistor
(1) Input resistance = r
i
=
CE
BE
B
V cons tan t
V
I

 

 

 
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324
(2) Output resistance = r
o
=
B
CE
C
I cons tan t
V
I

 

 

 
(3) A.C. current gain
CE
i ac
B
V cons tan t
Ic
A
I

 

  
 

 
(4) Transconductance = g
m
=
C
BE i
I ac
V r
 



D.C. Parameters of a transistor
(1) I
E
= I
B
+ I
C
(2) Current gain for CB circuit
C
dc
E
I
I
 
dc
1 
(3) Current gain for CE cicuit =
C
dc
B
I
I
 
dc
1 

Voltage gain for CE Amplifier
CE ac
L m L
BE i
V
Av R g R
V r
 
   


Power gain for CE Amplifier
2
L
p v i ac
i
R
A A A
r
  
* Oscillator :- Certain electronic circuits can generated any arbitrary frequency with desired amplitude of
voltage and current. Such circuit is known as oscillator.

Oscillator frequency
1
f
2 LC
 

* Logic gate :-

The logic circuit, with one or more than one input but only one output is called logic gate.

Basic logic gates are OR gate, AND gate and NOT gate

Universal logic gates are NAND gate and NOR gate
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325
* LOGIC GATES

A digital circuit with one or more input signals but only one output signal is known as logical gate.

The logic gates are the building blocks of a digital system. Each logic gate follows a certain logical
relationship between input and output voltage.

There are three basic logic gates :
 OR gate
 AND gate
 NOT gate
Truth table

It is a table that shows all possible input combinations and corresponding output combination for a logic
gate.
OR gate

An OR gate has two or more inputs but only one output.

It is called OR gate because the output is high if any or all the inputs are high.

The logic symbol of OR gate is
A
B
Y

The truth table for OR gate is
Input Output
A B Y
0 0 0
0 1 1
1 0 1
1 1 1

The Boolean expression for OR gate is
Y = A + B
AND gate

An AND gate has two or more inputs but only one output.

It is called AND gate because output is high only when all the inputs are high.

The logic symbol of AND gate is
A
B
Y
Page 4
326

The truth table for AND gate is
Input Output
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

The Boolean expression for AND gate is Y = A.B
NOT gate

The NOT gate is the simplest of all logic gates. It has only one input and one output.

NOT gate is also called inverter because it inverts the input.

The logic symbol of NOT gate is
A
Y

The truth table for NOT gate is
Input Output
A Y
0 1
1 0

The Boolean expression for NOT gate is Y =
A
NAND gate

It is an AND gate followed by a NOT gate.

The logic symbol for NAND gate is
A
B
Y

The truth table for NAND gate is
Input Output
A B Y
0 0 1
0 1 1
1 0 1
1 1 0

The Boolean expression for NAND gate is
Y A B
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327
NOR gate

It is an OR gate followed by a NOT gate.

The logic symbol of NOR gate is
A
B
Y

The truth table for NOR gate is
Input Output
A B Y
0 0 1
0 1 0
1 0 0
1 1 0

The Boolean expression for NOR gate is
Y A B 
Exclusive OR gate or XOR gate

The logic symbol of XOR gate is
A
B
Y

The truth table for XOR gate is
Input Output
A B Y
0 0 0
0 1 1
1 0 1
1 1 0

The Boolean expression for XOR gate is
Y A B A B A B     
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328
Exlusive NOR gate or XNOR gate

The logic symbol of XNOR gate is
A
B
Y

The truth table for XNOR gate is
Input Output
A B Y
0 0 1
0 1 0
1 0 0
1 1 1

The Boolean expression for XNOR gate is
Y A B A B A B     
NAND as a universal gate

NAND gate is called as universal gate because with the repeated use of NAND gate we can construct any
basic gate

NOT gate from NAND gate
A Y
Y A

AND gate from NAND gates
A
A B
Y
B

OR gate from NAND gates
A
B
A
B
Y
Y A B A B A B     
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329
NOR gate as a universal gate

NOR gate is called as universal gate because with the repeated use of NOR gate we can construct any
basic gate.

NOT gate from NOR gate
A
B

Y = A B

AND gate from NOR gate
A
B
A
B
Y

Y A B A.B A.B   

OR gate from NOR gate
A
A-B
B
Y
Y A B A B   
De Morgan's Theorems

A B A B  
A
B
Y
A
B
Y
NOR gate is equivelent to bubbled AND gate.

A B A B  
A
B
Y
A
B
Y

NAND is equivalent to bubbled OR gate.
Page 8
330
Boolean identities
A + B = B + A A

B = B

A
A + (B + C) = (A + B) + C A

(B

C) = (A

B)

C
A

(B + C) = A

B + A

C A + B

C = (A + B)

(A + C)
A +
0 = A A

1 = A
A + 1 = 1 A

0 = 0
A + A = A A

A = A
A A 1  A A 0 
A A A A
A B A.B  A.B A B 
A + A

B = A A

(A + B) = A
A A B A B   
 
A A B A B   
MCQ
For the answer of the following questions choose the correct alternative from
among the given ones.
(1) C, Si and Ge have same no. of valence electrons. C is an insulator because energy required to take one
electron out from
(A) Si is more (B) C is more (C) Ge is more (D) C is less
(2) Ionization energy of isolated phosphorous atonis 10 eV. Ionization energy of same atom in Si is nearly
eV (Relative Permitivity of silicon = 12)
(A) 0.1 (B) 0.2 (C) 0.3 (D) 0.4
(3) By adding impurity in intrinsic semiconductor P type semiconductor is made. charge of
these P type semiconductor is
(A) trivalent, neutral (B) pentaralent, neutral (C) pentavalent, positive (D) trivalent, negative
(4) Strong overlaping of different atomic orbitals makes
(A) different energy level (B) energy band (C) Conductor (D) Insulators
(5) We can not make p-n junction diode by making P type semi-condutor join with N - type semi-conductor,
because
(A) Inter-atomic spacing becomes less than 1A
O
(B) P - type will repel N - type
(C) There will be discontinuity for the flowing charge carriers
(D) semi-conducting properties will be lost
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331
(6) For p-n junction, which statement is incorrect
(A) Donor atoms are depleted of their holes in junction
(B) No net charge exists far from junction
(C) Barrier potential V
B
is generated
(D) Energy V
B
is to be surmounted before any charge can flow across junction
(7) The intrinsic semi-conductor has :
(A) a finite resistance which does not change with temperature
(B) infinite resistance which decreases with temperature
(C) Finite resistance which decreases with temperature
(D) Finite resistance which does not change with temperature
(8) The behaviour of Ge as semi-conductor is due to width of :
(A) Conduction band being large
(B) Forbidden band being large
(C) Conduction band being small
(D) Forbidden band being small and narrow
(9) Which of the following is not the advantage of PN junction diode over tube valve ?
(A) Unlimited life (B) No warming-up time after switching
(C) Large efficiency (D) Low consumption of Power
(10) The forward biased diode is
(A) (B)
(C) (D)
(11) A gate has the following truth table :
The gate is :
(A) OR (B) NOR (C) NAND (D) AND
Page 10

Electronic Devices Notes and MCQs

Electronic Devices Notes and MCQs

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